Design and Analysis of a 0.4V 1.08mW 12GHz High-Performance VCO in 0.18μm CMOS (Invited Paper)

To-Po Wang; Chung-Chin Li

doi:doi:10.11648/j.jeee.20130105.11

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Design and Analysis of a 0.4V 1.08mW 12GHz High-Performance VCO in 0.18μm CMOS (Invited Paper)

To-Po Wang, Chung-Chin Li

Published in Journal of Electrical and Electronic Engineering (Volume 1, Issue 5)

Received: 30 October 2013 Published: 30 November 2013

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Abstract

This paper presents the design and analysis of a high-performance fully-integrated 0.18μm CMOS voltage-controlled oscillator (VCO) with low supply voltage and low dc power consumption. To enhance the transconductance (gm) of MOSFETs and negative conductance (-Gm) of a cross-coupled pair, the device size of the nMOS cross-coupled pair is enlarged. For reducing the supply voltage and minimizing the dc power consumption, forward-body biased technique is utilized in this VCO, leading to the threshold voltage (Vt) reduction. Moreover, process variations are taken into accounted at low supply voltage, and the Monte-Carlo analysis is used to analyze the VCO phase noise and output power. At 0.4V low supply voltage, the fabricated 0.18μm CMOS VCO consumes 1.08mW low core power. At this bias condition, the measured phase noise at 1MHz offset from 12.77GHz carrier is -110.2 dBc/Hz, and the measured tuning range is 5.75%. Compared to recently published 0.18μm X-band CMOS VCOs, this work demonstrates the low supply voltage, low dc power dissipation, superior figure-of-merit (FOM), and better figure-of-merit including the tuning range (FOMT).

Published in	Journal of Electrical and Electronic Engineering (Volume 1, Issue 5)
DOI	10.11648/j.jeee.20130105.11
Page(s)	107-113
Creative Commons	This is an Open Access article, distributed under the terms of the Creative Commons Attribution 4.0 International License (http://creativecommons.org/licenses/by/4.0/), which permits unrestricted use, distribution and reproduction in any medium or format, provided the original work is properly cited.
Copyright	Copyright © The Author(s), 2013. Published by Science Publishing Group

Keywords

Monte-Carlo Analysis, Negative Conductance, Transconductance,Voltage-Controlled Oscillator

References

[1]	B. Park, S. Lee, S. Choi, and S. Hong, "A 12-GHz fully integrated cascode CMOS LC VCO with Q-enhancement circuit,"IEEE Microw.and Wireless Compon.Lett., vol. 18, pp.133-135, Feb. 2008.
[2]	X. S. Chen, Y. T. Chen, and H. R. Chuang, "A 1-V low-voltage 12-GHz VCO in 0.18-μm CMOS technology," in Asia Pacific Microw. Conf. Tech. Dig., Dec. 2008, pp. 1-4.
[3]	C. L. Yang and Y. C. Chiang, "Low-phase-noise and low-power CMOS VCO constructed in current-reused configuration,"IEEE Microw.and Wireless Compon.Lett., vol. 18, pp.136-138, Feb. 2008.
[4]	M. T. Hsu and C. T. Chiu, "A low-power 10-GHz current reused VCO using negative resistance enhancement technique," in Asia Pacific Microw. Conf. Tech. Dig., Dec. 2010, pp. 2276-2279.
[5]	H. K. Chiou and S. C. Chen, "Low-phase-noise Ku-band Gm-Boosting differential Colpitts VCO," in Asia Pacific Microw. Conf. Tech. Dig., Dec. 2009, pp. 313-316.
[6]	S. L. Jang, Y. K. Wu, C. C. Liu, and J. F. Huang, "A dual-band CMOS voltage-controlled oscillator implemented with dual-resonance LC tank,"IEEE Microw.and Wireless Compon.Lett., vol. 19, pp. 816-818, Dec. 2009.
[7]	B. Razavi, "Design of millimeter-wave CMOS radios: a tutorial," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 56, no. 1, pp. 4-16,Jan. 2009.
[8]	J. Yang, C. Y. Kim, D. W. Kim, and S. Hong, "Design of a 24-GHz CMOS VCO with an asymmetric-width transformer,"IEEE Trans.Circuit and Systems Part-II Express Briefs, vol. 57, no. 3, pp. 173-177, March 2010.
[9]	A. Bevilacqua, F. P. Pavan, C. Sandner, A. Gerosa, and A. Neviani, "Transformer-based dual-mode voltage-controlled oscillators,"IEEE Trans.Circuit and Systems Part-II Express Briefs, vol. 54, no. 4, pp. 293-297, April 2007.
[10]	N. T. Tchamov, S. S. Broussev, I. S. Uzunov, and K. K. Rantala, "Dual-band LC VCO architecture with a fourth-order resonator,"IEEE Trans.Circuit and Systems Part-II Express Briefs, vol. 54, no. 3, pp. 277-281, Mar. 2007.
[11]	T. P. Wang and C. C. Li, "A 0.4-V 1.08-mW 12-GHz high-performance VCO in 0.18-m CMOS," in 2012 IEEE Radio and Wireless Symposium (RWS) Proceedings, Santa Clara, CA, USA, Jan. 15-18, 2012. pp.207-210.
[12]	T. P. Wang, "A low-voltage low-power K-band CMOS LNA using dc-current-path split technology,"IEEE Microwave and Wireless Component Letter, vol. 20, pp.519-521, Sept. 2010.
[13]	T. P. Wang, Z. M. Tsai, K. J. Sun, and H. Wang, "Phase-noise reduction of X-band push-push oscillator with second-harmonic self-injection technique," IEEE Trans.Microw. Theory Tech., vol. 55, no. 1, pp.66-77, Jan. 2007.
[14]	T. P. Wang, "A fully integrated W-band push-push CMOS VCO with low phase noise and wide tuning range," IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control, vol. 58, no. 7, pp. 1307-1319, July 2011.

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APA Style

To-Po Wang, Chung-Chin Li. (2013). Design and Analysis of a 0.4V 1.08mW 12GHz High-Performance VCO in 0.18μm CMOS (Invited Paper). Journal of Electrical and Electronic Engineering, 1(5), 107-113. https://doi.org/10.11648/j.jeee.20130105.11

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ACS Style

To-Po Wang; Chung-Chin Li. Design and Analysis of a 0.4V 1.08mW 12GHz High-Performance VCO in 0.18μm CMOS (Invited Paper). J. Electr. Electron. Eng. 2013, 1(5), 107-113. doi: 10.11648/j.jeee.20130105.11

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AMA Style

To-Po Wang, Chung-Chin Li. Design and Analysis of a 0.4V 1.08mW 12GHz High-Performance VCO in 0.18μm CMOS (Invited Paper). J Electr Electron Eng. 2013;1(5):107-113. doi: 10.11648/j.jeee.20130105.11

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@article{10.11648/j.jeee.20130105.11,
  author = {To-Po Wang and Chung-Chin Li},
  title = {Design and Analysis of a 0.4V 1.08mW 12GHz High-Performance VCO in 0.18μm CMOS (Invited Paper)},
  journal = {Journal of Electrical and Electronic Engineering},
  volume = {1},
  number = {5},
  pages = {107-113},
  doi = {10.11648/j.jeee.20130105.11},
  url = {https://doi.org/10.11648/j.jeee.20130105.11},
  eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.jeee.20130105.11},
  abstract = {This paper presents the design and analysis of a high-performance fully-integrated 0.18μm CMOS voltage-controlled oscillator (VCO) with low supply voltage and low dc power consumption. To enhance the transconductance (gm) of MOSFETs and negative conductance (-Gm) of a cross-coupled pair, the device size of the nMOS cross-coupled pair is enlarged. For reducing the supply voltage and minimizing the dc power consumption, forward-body biased technique is utilized in this VCO, leading to the threshold voltage (Vt) reduction. Moreover, process variations are taken into accounted at low supply voltage, and the Monte-Carlo analysis is used to analyze the VCO phase noise and output power. At 0.4V low supply voltage, the fabricated 0.18μm CMOS VCO consumes 1.08mW low core power. At this bias condition, the measured phase noise at 1MHz offset from 12.77GHz carrier is -110.2 dBc/Hz, and the measured tuning range is 5.75%. Compared to recently published 0.18μm X-band CMOS VCOs, this work demonstrates the low supply voltage, low dc power dissipation, superior figure-of-merit (FOM), and better figure-of-merit including the tuning range (FOMT).},
 year = {2013}
}

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TY  - JOUR
T1  - Design and Analysis of a 0.4V 1.08mW 12GHz High-Performance VCO in 0.18μm CMOS (Invited Paper)
AU  - To-Po Wang
AU  - Chung-Chin Li
Y1  - 2013/11/30
PY  - 2013
N1  - https://doi.org/10.11648/j.jeee.20130105.11
DO  - 10.11648/j.jeee.20130105.11
T2  - Journal of Electrical and Electronic Engineering
JF  - Journal of Electrical and Electronic Engineering
JO  - Journal of Electrical and Electronic Engineering
SP  - 107
EP  - 113
PB  - Science Publishing Group
SN  - 2329-1605
UR  - https://doi.org/10.11648/j.jeee.20130105.11
AB  - This paper presents the design and analysis of a high-performance fully-integrated 0.18μm CMOS voltage-controlled oscillator (VCO) with low supply voltage and low dc power consumption. To enhance the transconductance (gm) of MOSFETs and negative conductance (-Gm) of a cross-coupled pair, the device size of the nMOS cross-coupled pair is enlarged. For reducing the supply voltage and minimizing the dc power consumption, forward-body biased technique is utilized in this VCO, leading to the threshold voltage (Vt) reduction. Moreover, process variations are taken into accounted at low supply voltage, and the Monte-Carlo analysis is used to analyze the VCO phase noise and output power. At 0.4V low supply voltage, the fabricated 0.18μm CMOS VCO consumes 1.08mW low core power. At this bias condition, the measured phase noise at 1MHz offset from 12.77GHz carrier is -110.2 dBc/Hz, and the measured tuning range is 5.75%. Compared to recently published 0.18μm X-band CMOS VCOs, this work demonstrates the low supply voltage, low dc power dissipation, superior figure-of-merit (FOM), and better figure-of-merit including the tuning range (FOMT).
VL  - 1
IS  - 5
ER  -

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Author Information

To-Po Wang

Department of Electronic Engineering and Graduate Institute of Computer and Communication Engineering, National Taipei University of Technology, Taipei, Taiwan, R.O.C
Chung-Chin Li

Department of Electronic Engineering and Graduate Institute of Computer and Communication Engineering, National Taipei University of Technology, Taipei, Taiwan, R.O.C

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Plain Text BibTeX RIS

APA Style

To-Po Wang, Chung-Chin Li. (2013). Design and Analysis of a 0.4V 1.08mW 12GHz High-Performance VCO in 0.18μm CMOS (Invited Paper). Journal of Electrical and Electronic Engineering, 1(5), 107-113. https://doi.org/10.11648/j.jeee.20130105.11

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ACS Style

To-Po Wang; Chung-Chin Li. Design and Analysis of a 0.4V 1.08mW 12GHz High-Performance VCO in 0.18μm CMOS (Invited Paper). J. Electr. Electron. Eng. 2013, 1(5), 107-113. doi: 10.11648/j.jeee.20130105.11

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AMA Style

To-Po Wang, Chung-Chin Li. Design and Analysis of a 0.4V 1.08mW 12GHz High-Performance VCO in 0.18μm CMOS (Invited Paper). J Electr Electron Eng. 2013;1(5):107-113. doi: 10.11648/j.jeee.20130105.11

Copy | Download

@article{10.11648/j.jeee.20130105.11,
  author = {To-Po Wang and Chung-Chin Li},
  title = {Design and Analysis of a 0.4V 1.08mW 12GHz High-Performance VCO in 0.18μm CMOS (Invited Paper)},
  journal = {Journal of Electrical and Electronic Engineering},
  volume = {1},
  number = {5},
  pages = {107-113},
  doi = {10.11648/j.jeee.20130105.11},
  url = {https://doi.org/10.11648/j.jeee.20130105.11},
  eprint = {https://article.sciencepublishinggroup.com/pdf/10.11648.j.jeee.20130105.11},
  abstract = {This paper presents the design and analysis of a high-performance fully-integrated 0.18μm CMOS voltage-controlled oscillator (VCO) with low supply voltage and low dc power consumption. To enhance the transconductance (gm) of MOSFETs and negative conductance (-Gm) of a cross-coupled pair, the device size of the nMOS cross-coupled pair is enlarged. For reducing the supply voltage and minimizing the dc power consumption, forward-body biased technique is utilized in this VCO, leading to the threshold voltage (Vt) reduction. Moreover, process variations are taken into accounted at low supply voltage, and the Monte-Carlo analysis is used to analyze the VCO phase noise and output power. At 0.4V low supply voltage, the fabricated 0.18μm CMOS VCO consumes 1.08mW low core power. At this bias condition, the measured phase noise at 1MHz offset from 12.77GHz carrier is -110.2 dBc/Hz, and the measured tuning range is 5.75%. Compared to recently published 0.18μm X-band CMOS VCOs, this work demonstrates the low supply voltage, low dc power dissipation, superior figure-of-merit (FOM), and better figure-of-merit including the tuning range (FOMT).},
 year = {2013}
}

Copy | Download

TY  - JOUR
T1  - Design and Analysis of a 0.4V 1.08mW 12GHz High-Performance VCO in 0.18μm CMOS (Invited Paper)
AU  - To-Po Wang
AU  - Chung-Chin Li
Y1  - 2013/11/30
PY  - 2013
N1  - https://doi.org/10.11648/j.jeee.20130105.11
DO  - 10.11648/j.jeee.20130105.11
T2  - Journal of Electrical and Electronic Engineering
JF  - Journal of Electrical and Electronic Engineering
JO  - Journal of Electrical and Electronic Engineering
SP  - 107
EP  - 113
PB  - Science Publishing Group
SN  - 2329-1605
UR  - https://doi.org/10.11648/j.jeee.20130105.11
AB  - This paper presents the design and analysis of a high-performance fully-integrated 0.18μm CMOS voltage-controlled oscillator (VCO) with low supply voltage and low dc power consumption. To enhance the transconductance (gm) of MOSFETs and negative conductance (-Gm) of a cross-coupled pair, the device size of the nMOS cross-coupled pair is enlarged. For reducing the supply voltage and minimizing the dc power consumption, forward-body biased technique is utilized in this VCO, leading to the threshold voltage (Vt) reduction. Moreover, process variations are taken into accounted at low supply voltage, and the Monte-Carlo analysis is used to analyze the VCO phase noise and output power. At 0.4V low supply voltage, the fabricated 0.18μm CMOS VCO consumes 1.08mW low core power. At this bias condition, the measured phase noise at 1MHz offset from 12.77GHz carrier is -110.2 dBc/Hz, and the measured tuning range is 5.75%. Compared to recently published 0.18μm X-band CMOS VCOs, this work demonstrates the low supply voltage, low dc power dissipation, superior figure-of-merit (FOM), and better figure-of-merit including the tuning range (FOMT).
VL  - 1
IS  - 5
ER  -

Copy | Download